Rensselaer Researcher Wins IEEE Award for Work on 3-D Computer Chips
May 27, 2008
A professor at Rensselaer Polytechnic Institute will be recognized this week for research and technical achievements toward the design and realization of 3-D integrated computer chips.
James Jian-Qiang Lu, associate professor in the Department of Electrical, Computer, and Systems Engineering (ECSE) and the Center for Integrated Electronics (CIE) at Rensselaer, will receive the 2008 IEEE CPMT Exceptional Technical Achievement Award from the Institute of Electrical and Electronics Engineers’ Components, Packaging and Manufacturing Technology Society.
The award — designated for an individual or group who develops a significant invention, introduces an important new technology or product, or advances the state-of-the-art in the CPMT Society’s field of interest — honored Lu as a leader in the field of 3-D chip packaging and manufacturing.
“Dr. Lu is being recognized as a pioneer and technical leader in 3-D integration/packaging. His contributions span nearly 20 years and have resulted in more than 150 publications in this field in refereed journals, book chapters, trade press journals, and conferences,” the IEEE CPMT said in the award citation. The award also included a $2,500 prize.
The award will be presented at the international 2008 IEEE Electronic Components and Technology Conference on May 29 in Lake Buena Vista, Fla. Lu will attend the conference and present both a research paper and a professional development course on 3-D integration.
Lu is a pioneer and technical leader in 3-D computer chip integration, and has been working to design the processes and architecture that could one day be the platform for 3-D chips.
Flat, conventional computer chips used today can only shrink so much smaller, as their flat surface must have enough room to accommodate scores of different components. But the semiconductor industry and academia are looking at ways to layer chip components into a vertical, 3-D stack, which could dramatically shrink the size of the overall chip and take advantage of high data bandwidth, performance efficiency, and functionality increase of the 3-D integration.
Lu’s research spans a wide spectrum of micro- nano-electronics technology, from theory and design to materials, devices, processing, and system integration. He also studies 3-D hyper-integration technology and micro-nano-bio interfaces for future chips, novel electron devices, interconnect technology, micro-system integration technology for micro-electrical-mechanical systems (MEMS), and has long-term research projects on photonics, nanotech, bio-MEMS, bio-engineering, bio-inspired devices, and information processing/computation.
He has collaborated with many on-campus colleagues from the departments of ECSE; Physics; Materials Science and Engineering; Chemical and Biological Engineering; as well as Mechanical, Aerospace, and Nuclear Engineering at Rensselaer. Lu has collaborated with off-campus researchers from the College of Nanoscale Science and Engineering at University at Albany, Massachusetts Institute of Technology, Georgia Institute of Technology, IBM Corp., Freescale Semiconductor, SEMATECH, and EVGroup.
Lu’s research has been supported by Defense Advanced Research Projects Agency, the Microelectronics Advanced Research Corporation, and the New York State Foundation for Science, Technology and Innovation (NYSTAR) through the Interconnect Focus Center, National Science Foundation, Semiconductor Research Corp., IBM, SEMATECH, Freescale, EVGroup, and other organizations.
Contact: Michael Mullaney
Phone: (518) 276-6161